cvs commit: src/sys/dev/hwpmc hwpmc_x86.c

Kip Macy kip.macy at gmail.com
Mon Dec 3 10:21:15 PST 2007


On Dec 3, 2007 2:50 AM, Joseph Koshy <jkoshy at freebsd.org> wrote:
> jkoshy      2007-12-03 10:50:58 UTC
>
>   FreeBSD src repository
>
>   Modified files:        (Branch: RELENG_7)
>     sys/dev/hwpmc        hwpmc_x86.c
>   Log:
>   MFC r1.6:
>   "Revert revision 1.4.
>
>    Intel CPUs with family 0x6, model 0xE and later (i.e., Intel Core(TM))
>    have a PMC architecture that differs somewhat from previous CPUs in
>    family 0x6.  Even though the basic programming model is similar, the
>    documented set of legal values that may be loaded into their PMC MSRs
>    differs from that of the previous PMCs in family 0x6 and reusing bit
>    values legal for the older PMCs could result in undefined behaviour in
>    the general case."


Can you say a little more about what the differences are or where one
could find a discussion of them without wading through different
processor model revisions? Kris, SCC, and I have been obtaining
sensible results using 0xE and 0xF for the small set of sampling
operations that we use.

 -Kip


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