cvs commit: src/sys/amd64/amd64 cpu_switch.S machdep.c
scottl at samsco.org
Thu Oct 20 07:34:52 PDT 2005
John Baldwin wrote:
> On Thursday 20 October 2005 01:45 am, Bruce Evans wrote:
>>On Tue, 18 Oct 2005, Scott Long wrote:
>>I use 100 and never downgraded to use 1000 except for testing how bad
>>it is. The default number is now up to <number of CPUs> * 2 * HZ.
>>E.g., it is 4000 on sledge.freebsd.org. While 4000 interrupts/sec can
>>be handled easily by any new machine, 4000 is a disgustingly large
>>number to use for clock interrupts. Have a look at vmstat -i output
>>on almost any machine. On most machines in the freebsd cluster, the
>>total number of interrupts is dominated by clock interrupts even with
>>HZ = 100.
> Note that on 4.x you don't get to see the interrupt counts for the hz + stathz
> * (cpus - 1) IPIs for all the clock interrupts, so in real numbers, each CPU
> has gone from hz + stathz to hz * 2 interrupts. However, the higher number
> is offset by the fact that the interrupt handler for the lapic case doesn't
> have to touch any hardware, and it also works much more reliably (getting
> irq0 to work in APIC mode on some amd64 nvidia chipsets required several
> quirks, and future motherboards will probably continue to require quirks
> since Windows uses the APIC timer in APIC mode and doesn't require irq0 to
> work in APIC mode).
I'm in complete argreement that using the APIC timer is the right thing
to do, and I believe that we did some tests to show that the high
interrupt rate didn't have an appreciable effect on performance.
However, I'd like to revisit the HZ=1000 decision for 7-CURRENT.
More information about the cvs-src