cvs commit: src/sys/amd64/amd64 io_apic.c local_apic.c src/sys/amd64/include apicvar.h intr_machdep.h src/sys/i386/i386 io_apic.c local_apic.c src/sys/i386/include apicvar.h intr_machdep.h

[John Baldwin]

jhb         2005-11-02 20:11:47 UTC

  FreeBSD src repository

  Modified files:
    sys/amd64/amd64      io_apic.c local_apic.c 
    sys/amd64/include    apicvar.h intr_machdep.h 
    sys/i386/i386        io_apic.c local_apic.c 
    sys/i386/include     apicvar.h intr_machdep.h 
  Log:
  Change the x86 code to allocate IDT vectors on-demand when an interrupt
  source is first enabled similar to how intr_event's now allocate ithreads
  on-demand.  Previously, we would map IDT vectors 1:1 to IRQs.  Since we
  only have 191 available IDT vectors for I/O interrupts, this limited us
  to only supporting IRQs 0-190 corresponding to the first 190 I/O APIC
  intpins.  On many machines, however, each PCI-X bus has its own APIC even
  though it only has 1 or 2 devices, thus, we were reserving between 24 and
  32 IRQs just for 1 or 2 devices and thus 24 or 32 IDT vectors.  With this
  change, a machine with 100 IRQs but only 5 in use will only use up 5 IDT
  vectors.  Also, this change provides an API (apic_alloc_vector() and
  apic_free_vector()) that will allow a future MSI interrupt source driver to
  request IDT vectors for use by MSI interrupts on x86 machines.
  
  Tested on:      amd64, i386
  
  Revision  Changes    Path
  1.18      +84 -68    src/sys/amd64/amd64/io_apic.c
  1.19      +100 -22   src/sys/amd64/amd64/local_apic.c
  1.14      +3 -2      src/sys/amd64/include/apicvar.h
  1.7       +29 -3     src/sys/amd64/include/intr_machdep.h
  1.23      +84 -68    src/sys/i386/i386/io_apic.c
  1.20      +101 -23   src/sys/i386/i386/local_apic.c
  1.14      +3 -2      src/sys/i386/include/apicvar.h
  1.9       +29 -3     src/sys/i386/include/intr_machdep.h