cvs commit: src/sys/alpha/alpha machdep.c src/sys/alpha/include cpuconf.h src/sys/alpha/pci lca.c lcareg.h

John Baldwin jhb at FreeBSD.org
Tue Feb 1 06:56:05 PST 2005


On Monday 31 January 2005 06:07 pm, Bernd Walter wrote:
> ticso       2005-01-31 23:07:42 UTC
>
>   FreeBSD src repository
>
>   Modified files:
>     sys/alpha/alpha      machdep.c
>     sys/alpha/include    cpuconf.h
>     sys/alpha/pci        lca.c lcareg.h
>   Log:
>   add cpu_idle support for 21066A based lca systems
>
>   Revision  Changes    Path
>   1.229     +9 -1      src/sys/alpha/alpha/machdep.c
>   1.14      +1 -0      src/sys/alpha/include/cpuconf.h
>   1.21      +29 -0     src/sys/alpha/pci/lca.c
>   1.4       +2 -0      src/sys/alpha/pci/lcareg.h

What exactly are the writes to this register doing btw?  Also, is there any 
reason we shouldn't just be using the PAL call that waits for the next 
interrupt instead?

-- 
John Baldwin <jhb at FreeBSD.org>  <><  http://www.FreeBSD.org/~jhb/
"Power Users Use the Power to Serve"  =  http://www.FreeBSD.org


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