cvs commit: ports/cad/p5-Verilog-Perl Makefile distinfo
Philip M. Gollucci
pgollucci at FreeBSD.org
Sun Dec 27 02:02:02 UTC 2009
pgollucci 2009-12-27 02:02:02 UTC
FreeBSD ports repository
Modified files:
cad/p5-Verilog-Perl Makefile distinfo
Log:
- Update to 3.222
PR: ports/141552
Approved by: maintainer
Submitted by: myself (pgollucci@)
Revision Changes Path
1.8 +1 -1 ports/cad/p5-Verilog-Perl/Makefile
1.5 +3 -3 ports/cad/p5-Verilog-Perl/distinfo
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